1. Field of the Invention
The present invention relates to an impedance adjustment technology for use with semiconductor circuits and, more specifically, to a technology that is effective when applied to an input/output circuit having the nonlinear resistance characteristics, and a computing device, a communications device, and others using the input/output circuit.
2. Description of Related Art
The results of the study conducted by the inventor of the invention tell that, in the impedance adjustment technology for use with semiconductor circuits, driver circuits for high-speed transmission are CMOS (Complementary Metal Oxide Semiconductor) output circuits that are effective for size reduction and power savings, for example. Such a CMOS output circuit is using a MOS (Metal Oxide Semiconductor) for a resistance element, i.e., transmission gate, and thus the output resistance value is nonlinear with respect to the output voltage. For adjusting such a resulting output resistance value, generally, the voltage-current characteristics are measured for the circuit, and the output resistance value at an operating point is found on the graph by manual differentiation of the resulting measurement value.